π²
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15 interactive chip design simulations. Free forever.
15 Simulations
β‘
Pipeline Processor
5-stage instruction pipeline with hazard detection. Data forwarding, stalls, branch flush visualized. CPI comparison.
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Wafer/Die Viewer
Zoom from 300mm silicon wafer β die β standard cells β transistor cross-section. Yield simulation. Electron microscope feel.
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architecture
CPU Builder
Working 8-bit CPU β write assembly, watch fetch/decode/execute with animated data flow. 3 programs
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Waveform Analyzer
Neural net trained in-browser classifies digital signals
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AI Circuit Classifier
CLIP model identifies hand-drawn circuit components. Draw or pick presets β AI classifies AND/OR/resistor/capacitor/op-amp.
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π’
Binary Calculator
Binary/hex/decimal converter with gate-level visualization. Ripple carry adder, shift-and-add multiplier, IEEE 754 floats.
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Logic Gates
AND, OR, NOT, NAND, XOR, XNOR, NOR β click inputs to toggle, see truth tables, watch signals propagate through gates.
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β
ALU Simulator
8-bit ALU β click individual bits, choose ADD/SUB/AND/OR/XOR/NOT/SHL/SHR. See binary math + CPU flags (Z/N/C/V).
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β±οΈ
Flip-Flops & Counters
SR Latch, D Flip-Flop, JK Flip-Flop, 4-bit Counter. Clock pulse, timing diagram, sequential logic explained.
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π§
Circuit Diagram Tool
Draw circuits with wire/resistor/capacitor/op-amp tools. Auto-analyze: detect nodes, generate SPICE netlist.
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πΎ
Cache Simulator
L1/L2 cache sim. Direct-mapped, set-associative. LRU/FIFO. Hit rate tracking.
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FSM Builder
Visual state machine editor. Add states, transitions. Simulate. Generate Verilog.
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βοΈ
Binary Multiplier
Shift-and-add multiplication visualized. Step through partial products bit by bit.
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πΊοΈ
Karnaugh Map
2/3/4 variable K-maps. Click cells, auto-group, minimize Boolean expression.
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π
Memory Hierarchy
Registers β L1 β L2 β L3 β RAM β Disk. Access latency animation. Miss penalty calc.
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