๐Ÿ”ฒ FreeChipStore
Serge

Serge

4 simulations on FreeChipStore
fundamentals sequential design
GitHub @serge-ivo
Contributions by category
fundamentals (2) sequential (1) design (1)

Simulations by Serge

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Logic Gates
AND, OR, NOT, NAND, XOR, XNOR, NOR โ€” click inputs to toggle, see truth tables, watch signals propaga
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ALU Simulator
8-bit ALU โ€” click individual bits, choose ADD/SUB/AND/OR/XOR/NOT/SHL/SHR. See binary math + CPU flag
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Flip-Flops & Counters
SR Latch, D Flip-Flop, JK Flip-Flop, 4-bit Counter. Clock pulse, timing diagram, sequential logic ex
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Circuit Diagram Tool
Draw circuits with wire/resistor/capacitor/op-amp tools. Auto-analyze: detect nodes, generate SPICE